![]() ![]() ![]() But if its a 3.3v device, many CPLD's require ISP downloading at their native VCC. I'd be happy to program a chip for you, be it lattice or Xilinx, but as petrv pointed out, simple PCI parallel port card + the parts for download cable (either a lattice OR a xilinx one) would just be less hassle for all concerned (especially your friend if he lives miles away from me ^^ ).Ī few caveats for the download cable construction:ġ) If your CPLD (again, xilinx or Lattice) is a 5v device, then thats fine, any form of TTL buffer would do. The card should not be that expensive (but as I said it must be PCI, not USB) I assume you don't want to buy the Xilinx USB JTAG adapter ($160) so you can build the simple parallel port adapter with 74HC125 but you will need to buy a PCI parallel port card for your PC if you don't have a parallel port. For each development there at least a few iterations and it would be extremely inpractical to ship the device to another country and back to reprogram it with the new version (after fixing a problem etc). ) you can just run the synthesis tool and hope it will work, otherwise unfortunately you'll have to design the logic from the scratch. Obviously you cannot program Xilinx device with a file for Lattice device. I don't think it is practical to ask someone else to program the device (especially in another country) - especially in this case as you are going to do a little redesign - replacing the PLD - so you will need to have a new programming file. ![]()
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